1. Field of the Invention
The present invention relates to an apparatus and a method for forming a thin film such as an insulator film to planarize a surface of a semiconductor device having convex and concave regions.
2. Description of the Prior Art
In order to obtain an LSI with a high degree of packaging density and a high degree of reliability in operation, the planarization technique for planarizing elements and interconnection is essential. There have been proposed and demonstrated various planarization techniques such as a lift-off method, an etch-back method, a spin-on method, a bias sputtering method and so on. The lift-off method has a problem that its process is complicated and a problem that the resist used in this process is not fully removed. The etch-back method has problems such as the difficulty of uniformly applying a resin and uniformly controlling a thickness of a wafer being etched. According to the spin-on method, the thickness of a film must be sufficiently increased in order to prevent pinholes, so that there arise the problems that it is difficult to form a extremely fine through-hole because an aspect ratio of the through-hole becomes higher. In addition, there are the problems of a high dielectric constant and of contamination.
The bias sputtering method (see, for example, C. Y. Ting, "Study of planarized sputter-deposited SiO.sub.2 ", J.Vc.Sic. Technol., 15(3), May/June 1978, pp. 1105-1112) has considerable attention recently because only one apparatus is needed to planarize a surface having convex and concave regions by thin film.
FIG. 1 shows a construction of one example for carrying out the above-described bias sputtering method. In FIG. 1, reference numeral 1 designates a substrate electrode; 2, a target electrode; 3A and 3B, electrical power sources for radio frequency (rf) bias; 4, a specimen chamber; 5, a gas introduction system; and 6, a specimen substrate.
With this apparatus, the target electrode 2 is sputtered so that the particles of the material sputtered are deposited on the surface of the specimen substrate 6 to form an insulator film. In this case, an rf voltage from the power source 3B is also applied through the electrode 1 to the specimen substrate 6 so that Ar ions are incident to the substrate 6. The planarization of the insulator film can be accomplished by utilizing the fact that the etching rate of the insulator film by Ar ions is faster on an inclined surface portion of the substrate than on a flat surface of the substrate 6 in parallel with the substrate 6.
The bias sputter method can accomplish the planarization of a thin film, but it has the following defects:
(1) Since the film-forming particles arrive at the surface of a specimen at an inclined incidence angle, it is not possible to deposit a flat insulator film over a concave region of submicron interconnection whose aspect ratio (height/space of interconnection) is substantially equal to 1.0 or higher than 1.0.
(2) Since the specimen substrate 6 is located in a portion where plasma is produced, its temperature rises high so that a thin film cannot be deposited over a resist layer on the substrate.
(3) In order to increase a film deposition rate and an etching rate, the rf powers of the power sources 3A and 3B must be increased. In this case, however, there is the possibility that the substrate 6 is damaged. Accordingly, the increase in the rf power source is limited.
(4) Since the rf power cannot be increased and the deposition rate is relatively decreased due to the etching effect caused by the application of a bias voltage to the substrate, a throughput is low.
(5) If the purity of the target used is low, it frequently occurs that impurities are mixed with a film being deposited.